Future electronic devices will be required to be smaller, faster, and consume less power than present devices. One means of achieving at least one of these requirements involves the incorporation of copper in the conductive interconnects of the device. However, conductive layers which are comprised of fairly substantial amounts of copper are difficult to etch. Hence, it is difficult to form patterned structures using a material which is comprised of any appreciable amount of copper using standard etching techniques.
A method to form structures out of copper-containing conductors is referred to as a "damascene" method. The damascene method involves forming a trench and/or an opening in a dielectric layer which is to lie beneath and on either side of the copper-containing structures. Once the trenches and/or openings are formed, a blanket layer of the copper-containing material is formed over the entire device. The thickness of this layer must be at least as thick as the deepest trench and/or opening. After the trenches and/or the openings are filled with the copper-containing material, the copper-containing material over the trenches/openings is removed, preferably by chemical-mechanical polishing (CMP), so as to leave the copper-containing material in the trenches and openings but not over the dielectric or over the uppermost portion of the trench/opening.
A problem with this technique is that it does not provide for a means of inhibiting the oxidation of the copper-containing structures when the device is subjected to an oxygen ambient.